US 12,439,673 B2
Split gate FerroFET
Jan Van Houdt, Bekkevoort (BE)
Assigned to IMEC VZW, Leuven (BE)
Filed by IMEC VZW, Leuven (BE)
Filed on Dec. 20, 2022, as Appl. No. 18/069,010.
Claims priority of application No. 21216257 (EP), filed on Dec. 21, 2021.
Prior Publication US 2023/0197807 A1, Jun. 22, 2023
Int. Cl. H10D 64/00 (2025.01); H10B 51/30 (2023.01); H10D 30/01 (2025.01); H10D 30/69 (2025.01); H10D 64/01 (2025.01); H10D 64/27 (2025.01)
CPC H10D 64/511 (2025.01) [H10B 51/30 (2023.02); H10D 30/0415 (2025.01); H10D 30/701 (2025.01); H10D 64/033 (2025.01)] 17 Claims
OG exemplary drawing
 
1. A ferroelectric field-effect transistor comprising:
a substrate comprising a source region, a channel including a first portion and a second portion, and a drain region, wherein a well of the substrate extending under both the first portion and the second portion of the channel has a uniform doping level;
a ferroelectric material extending over both the first portion of the channel and a portion of the drain region;
a program gate arranged on the ferroelectric material and being at least coextensive with the first portion of the channel;
a gate dielectric extending over both a portion of the source region and the second portion of the channel; and
a select gate arranged on the gate dielectric and being at least coextensive with said portion of the source region and the second portion of the channel.