US 12,439,672 B2
Semiconductor backside contact structure with increased contact area
Ruilong Xie, Niskayuna, NY (US); Kangguo Cheng, Schenectady, NY (US); Julien Frougier, Albany, NY (US); Chanro Park, Clifton Park, NY (US); and Min Gyu Sung, Latham, NY (US)
Assigned to International Business Machines Corporation, Armonk, NY (US)
Filed by International Business Machines Corporation, Armonk, NY (US)
Filed on Sep. 16, 2022, as Appl. No. 17/932,919.
Prior Publication US 2024/0096983 A1, Mar. 21, 2024
Int. Cl. H10D 64/23 (2025.01); H01L 23/528 (2006.01); H10D 62/10 (2025.01); H10D 62/13 (2025.01); H10D 64/01 (2025.01); H10D 84/85 (2025.01)
CPC H10D 64/256 (2025.01) [H01L 23/5286 (2013.01); H10D 62/121 (2025.01); H10D 62/151 (2025.01); H10D 64/01 (2025.01); H10D 84/85 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
a plurality of source/drain regions within a field effect transistor, each of the plurality of source/drain regions including a top portion having a non-curved inverted V-shaped area;
a backside power rail electrically connected to at least one source/drain region through a backside metal contact, the backside metal contact wrapping around a top portion of the at least one source/drain region, a tip of the top portion of the plurality of source/drain regions pointing towards the backside power rail, the top portion of the at least one source/drain region being in electric contact with the backside metal contact; and
a first epitaxial layer being in contact with a top portion of at least another source/drain region adjacent to the at least one source/drain region for electrically isolating the at least another source/drain region from the backside power rail.