| CPC H10D 64/01 (2025.01) [H01L 21/3115 (2013.01); H10D 30/031 (2025.01); H10D 64/017 (2025.01); H10D 84/0177 (2025.01); H10D 84/038 (2025.01); H10D 84/85 (2025.01); H10D 30/6735 (2025.01); H10D 30/6739 (2025.01); H10D 30/6757 (2025.01); H10D 84/0167 (2025.01)] | 20 Claims |
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1. A method comprising:
forming nanostructures in a multilayer stack;
forming a gate dielectric surrounding the nanostructures;
forming a first p-metal work function layer surrounding the gate dielectric;
placing the nanostructures, the gate dielectric, and the first p-metal work function layer within a chamber;
after the forming the first p-metal work function layer, performing an anneal process, wherein performing the anneal process comprises diffusing oxygen through an outer perimeter of the first p-metal work function layer and into the gate dielectric, the outer perimeter encircling the gate dielectric and into an interfacial layer between the nanostructures and the gate dielectric, and wherein the diffusing oxygen at least partially diffuses oxygen from residual chamber oxygen within the chamber and increases an electrical work function differential at an interface between the gate dielectric and the first p-metal work function layer;
after performing the anneal process, forming a second p-metal work function layer; and
depositing a conductive fill material over the second p-metal work function layer.
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9. A method comprising:
forming nanostructures in a multilayer stack over a substrate;
forming an interlayer dielectric surrounding the nanostructures;
forming a gate dielectric surrounding the interlayer dielectric;
forming a first work function layer surrounding the gate dielectric;
placing the substrate, the nanostructures, the interlayer dielectric, the gate dielectric, and the first work function layer into a chamber;
annealing oxygen from the gate dielectric into the interlayer dielectric while also annealing oxygen through the first work function layer into the gate dielectric from residual chamber oxygen located within the chamber, wherein the diffusing the oxygen diffuses oxygen into at least a surface that is facing the substrate and is exposed to the annealing environment, wherein the diffusing the oxygen into the interlayer dielectric increases an electrical work function at an interface between the gate dielectric and the first work function layer;
after the diffusing, forming a second work function layer adjacent the first work function layer; and
forming a gate electrode stack by depositing a conductive fill material over the second work function layer.
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14. A method of manufacturing a semiconductor device, the method comprising:
forming a nanostructure stack;
forming a base structure of a gate stack, the forming the base structure comprising:
forming an interlayer dielectric surrounding each nanostructure of the nanostructure stack;
forming a gate dielectric surrounding the interlayer dielectric; and
forming a first p-metal work function layer;
placing the interlayer dielectric, the gate dielectric, the first p-metal work function layer, and each nanostructure into a chamber; and
annealing oxygen into the base structure from residual chamber oxygen within the chamber, wherein after the annealing the base structure having a composition that is greater than 50% oxygen by atomic weight, and wherein during the annealing the oxygen enters the base structure at least from a location between the nanostructures of the nanostructure stack; and
forming a top structure of the gate stack, the top structure comprising a second p-metal work function layer surrounding the first p-metal work function layer and a conductive fill material disposed over the second p-metal work function layer, wherein an electrical work function of the first p-metal work function layer is shifted by an annealing process towards a P-band edge.
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