US 12,439,665 B2
Semiconductor device, method for manufacturing semiconductor device, and electronic device
Atsushi Yamada, Hiratsuka (JP)
Assigned to Fujitsu Limited, Kawasaki (JP)
Filed by Fujitsu Limited, Kawasaki (JP)
Filed on Mar. 2, 2023, as Appl. No. 18/177,399.
Claims priority of application No. 2022-106120 (JP), filed on Jun. 30, 2022.
Prior Publication US 2024/0006493 A1, Jan. 4, 2024
Int. Cl. H10D 62/85 (2025.01); H10D 30/01 (2025.01); H10D 30/47 (2025.01); H10D 64/27 (2025.01)
CPC H10D 62/8503 (2025.01) [H10D 30/015 (2025.01); H10D 30/475 (2025.01); H10D 64/514 (2025.01)] 9 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a channel layer that includes a first nitride semiconductor that contains Ga;
a barrier layer that is provided on a first surface side of the channel layer, and includes a second nitride semiconductor that contains In, Al, and Ga;
a source electrode and a drain electrode that are provided on a second surface side of the barrier layer opposite to the channel layer side;
a gate electrode that is provided between the source electrode and the drain electrode, on the second surface side of the barrier layer; and
an insulating layer that is provided between the second surface of the barrier layer and the gate electrode,
wherein the insulating layer includes
a first insulating film that is provided on the second surface side of the barrier layer and contains SiN,
a second insulating film that is provided on a third surface side of the first insulating film opposite to the barrier layer side and contains SiAlN, and
a third insulating film that is provided on a fourth surface side of the second insulating film opposite to the first insulating film side, has an opening portion that leads to the fourth surface, and contains SiN, and
the gate electrode is provided at the opening portion of the third insulating film.