US 12,439,661 B2
Semiconductor device
Hiroto Yamagiwa, Hyogo (JP); Manabu Yanagihara, Osaka (JP); Takahiro Sato, Toyama (JP); Masahiro Hikita, Hyogo (JP); Hiroaki Ueno, Osaka (JP); and Yusuke Kinoshita, Kyoto (JP)
Assigned to PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD., Osaka (JP)
Appl. No. 17/637,352
Filed by Panasonic Intellectual Property Management Co., Ltd., Osaka (JP)
PCT Filed Aug. 21, 2020, PCT No. PCT/JP2020/031634
§ 371(c)(1), (2) Date Feb. 22, 2022,
PCT Pub. No. WO2021/039631, PCT Pub. Date Mar. 4, 2021.
Claims priority of provisional application 63/229,207, filed on Aug. 4, 2021.
Claims priority of application No. 2019-157572 (JP), filed on Aug. 30, 2019.
Prior Publication US 2022/0302259 A1, Sep. 22, 2022
Int. Cl. H10D 62/13 (2025.01); H10D 30/47 (2025.01); H10D 62/17 (2025.01); H10D 62/85 (2025.01)
CPC H10D 62/151 (2025.01) [H10D 30/4755 (2025.01); H10D 62/378 (2025.01); H10D 62/8503 (2025.01)] 13 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a substrate;
a first nitride semiconductor layer disposed above the substrate;
a second nitride semiconductor layer disposed above the first nitride semiconductor layer and having a band gap greater than a band gap of the first nitride semiconductor layer; and
a first field-effect transistor including a first source electrode, a first drain electrode, and a first gate electrode that are disposed above the second nitride semiconductor layer, the first source electrode and the first drain electrode being separated from each other, the first gate electrode being disposed between the first source electrode and the first drain electrode,
wherein the first field-effect transistor includes a third semiconductor layer disposed above the second nitride semiconductor layer in a part of a region between a lower part of the first source electrode and the first gate electrode, the third semiconductor layer being separated from the first gate electrode,
the third semiconductor layer and the first source electrode are electrically connected,
the third semiconductor layer is a p-type semiconductor, and
in the first field-effect transistor, a part of the first source electrode is located between the third semiconductor layer and the first gate electrode in a cross-sectional view.