US 12,439,656 B2
Semiconductor device and manufacturing method of the same
Shinichi Hoshi, Nisshin (JP)
Assigned to DENSO CORPORATION, Kariya (JP); TOYOTA JIDOSHA KABUSHIKI KAISHA, Toyota (JP); and MIRISE Technologies Corporation, Nisshin (JP)
Filed by DENSO CORPORATION, Kariya (JP); TOYOTA JIDOSHA KABUSHIKI KAISHA, Toyota (JP); and MIRISE Technologies Corporation, Nisshin (JP)
Filed on Nov. 14, 2022, as Appl. No. 18/055,032.
Claims priority of application No. 2021-200846 (JP), filed on Dec. 10, 2021; and application No. 2022-096016 (JP), filed on Jun. 14, 2022.
Prior Publication US 2023/0187490 A1, Jun. 15, 2023
Int. Cl. H10D 62/10 (2025.01); H01L 21/02 (2006.01); H01L 21/306 (2006.01); H01L 21/308 (2006.01); H10D 30/01 (2025.01); H10D 30/47 (2025.01); H10D 62/824 (2025.01); H10D 62/85 (2025.01); H10D 64/27 (2025.01)
CPC H10D 62/111 (2025.01) [H01L 21/0254 (2013.01); H01L 21/30621 (2013.01); H01L 21/308 (2013.01); H10D 30/015 (2025.01); H10D 30/477 (2025.01); H10D 62/824 (2025.01); H10D 62/8503 (2025.01); H10D 64/513 (2025.01)] 7 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a semiconductor substrate having a first surface and a second surface opposite to each other, and including a semiconductor element;
a first surface-side electrode disposed on the first surface of the semiconductor substrate and electrically coupled with the semiconductor element; and
a second surface-side electrode disposed on the second surface of the semiconductor substrate and electrically coupled with the semiconductor element, wherein
the semiconductor substrate includes:
a gallium nitride substrate having a hexagonal structure, and having a first principal surface and a second principal surface opposite to each other, the first principal surface being set to an m plane, one direction in a planar direction of the first principal surface being a direction along a c-axis direction, and the second principal surface forming the second surface of the semiconductor substrate; and
a plurality of first column regions and a plurality of second column regions disposed on the first principal surface of the gallium nitride substrate, the plurality of first column regions formed of a first nitride semiconductor layer and extending along a direction in the planar direction of the gallium nitride substrate, the plurality of second column regions formed of a second nitride semiconductor layer that is higher in band gap than the first nitride semiconductor layer, each of the plurality of second column regions disposed between adjacent two of the plurality of first column regions, the plurality of first column regions and the plurality of second column regions forming a polarization super junction structure,
the plurality of first column regions and the plurality of second column regions are alternately arranged along the c-axis direction in the first principal surface, and
the semiconductor element is configured to enable a current to flow between the first surface and the second surface of the semiconductor substrate.