US 12,439,652 B2
MOS device with sandwich structure and groove
Qi Yu, Hangzhou (CN)
Assigned to HANGZHOU FULLSEMI SEMICONDUCTOR CO., LTD., Hangzhou (CN)
Filed by HANGZHOU FULLSEMI SEMICONDUCTOR CO., LTD., Hangzhou (CN)
Filed on Oct. 14, 2022, as Appl. No. 17/966,742.
Claims priority of application No. 202111406269.6 (CN), filed on Nov. 24, 2021.
Prior Publication US 2023/0163165 A1, May 25, 2023
Int. Cl. H10D 64/01 (2025.01); H10D 62/10 (2025.01); H10D 64/27 (2025.01)
CPC H10D 62/102 (2025.01) [H10D 64/01 (2025.01); H10D 64/516 (2025.01); H10D 64/518 (2025.01)] 10 Claims
OG exemplary drawing
 
1. A method of manufacturing a MOS device, comprising:
providing a substrate, wherein a source region and a drain region are arranged in the substrate and spaced apart along a first direction parallel to the substrate;
forming a sandwich structure on the substrate, wherein the sandwich structure comprises a first SiO2 layer, a high-k dielectric layer over the first SiO2 layer, and a second SiO2 layer over the high-k dielectric layer;
forming a groove in the sandwich structure between the source region and the drain region, wherein a width of the groove is arranged along the first direction, wherein a depth of the groove extends from an upper surface of the second SiO2 layer and ends inside the sandwich structure, and wherein depths at two sides of the groove are shallower than a depth at a center of the groove; wherein a bottom surface of the groove is not lower than a top surface of the first SiO2 layer;
forming a gate conductive layer, wherein the gate conductive layer fills the groove, wherein a top surface of the gate conductive layer is arranged to be higher than a top surface of the second SiO2 layer; and
forming a sidewall structure on sidewalls of the gate conductive layer.
 
8. A MOS device, comprising:
a substrate, wherein a source region and a drain region are arranged in the substrate and are spaced apart in a first direction;
a sandwich structure, wherein the sandwich structure is disposed on the substrate, wherein the sandwich structure comprises a first SiO2 layer, a high-k dielectric layer over the first SiO2 layer, and a second SiO2 layer over the high-k dielectric layer;
a groove, wherein the groove is disposed in the sandwich structure between the source region and the drain region, wherein a width of the groove is arranged along the first direction; wherein the groove extends from a top surface of the second SiO2 layer and ends inside the sandwich structure, and wherein depths at two sides of the groove are shallower than a depth at a center of the groove;
a gate conductive layer, which fills in the groove, wherein a top surface of the gate conductive layer is higher than the top surface of the second SiO2 layer; and
a sidewall structure which is located on sidewalls of the gate conductive layer;
wherein a bottom surface of the groove is not lower than a top surface of the first SiO2 layer.