US 12,439,647 B2
Semiconductor device and manufacturing method thereof
Chen-Shuo Huang, Hsinchu (TW)
Assigned to AUO Corporation, Hsinchu (TW)
Filed by AUO Corporation, Hsinchu (TW)
Filed on Nov. 17, 2022, as Appl. No. 17/988,767.
Claims priority of provisional application 63/287,695, filed on Dec. 9, 2021.
Claims priority of application No. 111122796 (TW), filed on Jun. 20, 2022.
Prior Publication US 2023/0187556 A1, Jun. 15, 2023
Int. Cl. H10D 30/67 (2025.01); H01L 21/02 (2006.01); H01L 21/383 (2006.01); H01L 21/426 (2006.01); H10D 99/00 (2025.01)
CPC H10D 30/6755 (2025.01) [H01L 21/02565 (2013.01); H01L 21/383 (2013.01); H01L 21/426 (2013.01); H10D 30/6734 (2025.01); H10D 30/6757 (2025.01); H10D 99/00 (2025.01)] 12 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a substrate;
a semiconductor structure disposed on the substrate, wherein the semiconductor structure comprises:
a first metal oxide layer comprising a first island structure and a second island structure separated from each other in a first direction; and
a second metal oxide layer overlapping the first island structure and the second island structure, wherein the second metal oxide layer and the first island structure are stacked on each other to form a first thick portion, the second metal oxide layer and the second island structure are stacked on each other to form a second thick portion, and a portion of the second metal oxide layer between the first island structure and the second island structure forms a thin portion located between the first thick portion and the second thick portion, wherein a thickness of the first thick portion is greater than a thickness of the thin portion, a thickness of the second thick portion is greater than the thickness of the thin portion, and the first thick portion, the thin portion, and the second thick portion are connected in sequence along the first direction;
a gate dielectric layer disposed on the semiconductor structure;
a first gate disposed on the gate dielectric layer, wherein the first gate overlaps a portion of the first thick portion and a portion of the thin portion in a normal direction of a top surface of the substrate, and the first gate does not overlap another portion of the thin portion and the second thick portion in the normal direction of the top surface of the substrate;
a source electrically connected to the first thick portion; and
a drain electrically connected to the second thick portion.