| CPC H10D 30/6735 (2025.01) [H10D 30/014 (2025.01); H10D 30/43 (2025.01); H10D 30/6757 (2025.01); H10D 62/121 (2025.01); H10D 84/0128 (2025.01); H10D 84/038 (2025.01); H10D 84/83 (2025.01)] | 16 Claims |
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1. A method for manufacturing a pillar-shaped semiconductor device that includes
a first semiconductor pillar standing in a direction perpendicular to a substrate,
a first impurity region disposed at a bottom portion of the first semiconductor pillar,
a second impurity region disposed at a top portion of the first semiconductor pillar, one of the first impurity region and the second impurity region serving as a source, the other serving as a drain, the first semiconductor pillar between the first impurity region and the second impurity region serving as a channel,
a first gate insulating layer surrounding the first semiconductor pillar disposed between the first impurity region and the second impurity region, and
a first gate conductor layer surrounding the first gate insulating layer, the method comprising:
a step of forming the first impurity region such that the first impurity region extends in a band shape in a first direction in plan view;
a step of forming the first semiconductor pillar that overlaps the first impurity region in plan view;
a step of forming a semiconductor base that includes the first semiconductor pillar and the first impurity region and extends in a band shape in the first direction in plan view such that the semiconductor base connects to the bottom portion of the first semiconductor pillar;
a step of forming the first gate insulating layer and the first gate conductor layer such that the first semiconductor pillar is surrounded;
a step of forming a first insulating layer at an outer peripheral portion of the first gate conductor layer;
a step of forming, in the first insulating layer, a contact hole that overlaps the first impurity region disposed in the semiconductor base in plan view, has a bottom portion in contact with the first impurity region, and extends in a band shape in the first direction;
a step of forming, at the bottom portion of the contact hole, a first conductor layer that is in contact with the first impurity region and extends in a band shape in the first direction;
a step of forming, in the contact hole on the first conductor layer, a second insulating layer that has a hole or is made of a low-dielectric-constant material;
a step of lowering an upper surface of the second insulating layer below an upper end of the first gate conductor layer; and
a step of forming a second conductor layer that is in contact with the first gate conductor layer and extends in a band shape in a second direction perpendicular to the first direction in plan view.
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