US 12,439,639 B2
Thin film transistor array substrate including edge region capping conductive region
Jong Oh Seo, Seoul (KR); Hiroshi Okumura, Hwaseong-si (KR); and Jae Woo Jeong, Suwon-si (KR)
Assigned to Samsung Display Co., Ltd., Yongin-si (KR)
Filed by Samsung Display Co., Ltd., Yongin-Si (KR)
Filed on Mar. 8, 2022, as Appl. No. 17/689,019.
Claims priority of application No. 10-2021-0144459 (KR), filed on Oct. 27, 2021.
Prior Publication US 2023/0132252 A1, Apr. 27, 2023
Int. Cl. H10D 30/67 (2025.01); H10D 30/01 (2025.01); H10D 86/01 (2025.01); H10D 86/40 (2025.01); H10D 86/60 (2025.01)
CPC H10D 30/6731 (2025.01) [H10D 30/0314 (2025.01); H10D 30/0321 (2025.01); H10D 30/6745 (2025.01); H10D 30/6757 (2025.01); H10D 86/0221 (2025.01); H10D 86/0231 (2025.01); H10D 86/421 (2025.01); H10D 86/60 (2025.01); H10D 30/6746 (2025.01)] 16 Claims
OG exemplary drawing
 
1. A transistor substrate, comprising:
a substrate;
a semiconductor layer overlapping the substrate; and
a gate electrode overlapping the semiconductor layer,
wherein the semiconductor layer includes a channel region, a conductive region directly connected to an end of the channel region, and an edge portion positioned at an edge of the conductive region, and wherein a carbon concentration of the edge portion is higher than each of a carbon concentration of the channel region and a carbon concentration of the conductive region,
wherein an upper surface of the channel region is level with an upper surface of the edge portion,
wherein the semiconductor layer further includes a bottom portion positioned between the substrate and the channel region, and wherein a carbon concentration of the bottom portion is higher than each of the carbon concentration of the channel region and the carbon concentration of the conductive region.