US 12,439,633 B2
VTFET with controlled fin height
Ruilong Xie, Niskayuna, NY (US); Chun-Chen Yeh, Danbury, CT (US); Alexander Reznicek, Troy, NY (US); and Kangguo Cheng, Schenectady, NY (US)
Assigned to International Business Machines Corporation, Armonk, NY (US)
Filed by INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US)
Filed on Aug. 31, 2022, as Appl. No. 17/823,799.
Prior Publication US 2024/0072164 A1, Feb. 29, 2024
Int. Cl. H10D 30/63 (2025.01); H10D 30/01 (2025.01); H10D 62/13 (2025.01); H10D 64/01 (2025.01)
CPC H10D 30/63 (2025.01) [H10D 30/025 (2025.01); H10D 62/151 (2025.01); H10D 64/018 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a vertical transport field-effect transistor (VTFET) device including
a bottom source/drain (S/D) epitaxial layer, and
a vertical fin channel formed on the bottom S/D epitaxial layer,
wherein a first side of the vertical fin channel is aligned with a first side of the bottom S/D epitaxial layer, and
wherein the bottom S/D epitaxial layer has a stepped cross-sectional profile including an upper portion in contact with the vertical fin channel and a topmost surface of the upper portion of the bottom S/D epitaxial layer having a width that is greater than a width of the vertical fin channel.