| CPC H10D 30/608 (2025.01) [H10D 30/0225 (2025.01); H10D 30/025 (2025.01); H10D 30/63 (2025.01); H10D 30/792 (2025.01); H10D 62/292 (2025.01); H10D 64/017 (2025.01); H10D 64/027 (2025.01); H10D 64/513 (2025.01)] | 7 Claims |
|
1. A semiconductor device comprising:
a semiconductor substrate; and
a transistor arranged on the semiconductor substrate, the transistor including a gate insulating film on the semiconductor substrate, a gate electrode arranged above the gate insulating film, and first and second source-drain regions on opposing sides of the gate electrode, wherein
the semiconductor substrate includes a repeating patterned surface in a portion corresponding to the gate electrode,
the patterned surface includes raised portions that respectively have upper surfaces, the upper surfaces of the raised portions extending in a horizontal direction in a cross sectional view, the gate insulating film covering the upper surfaces of the raised portions,
the patterned surface includes recessed portions where the gate insulating film covers surfaces of respective grooves, the surfaces of the grooves extending in the horizontal direction in the cross sectional view,
the patterned surface extends between a first element isolation region and a second element isolation region,
the upper surfaces of the raised portions are lower than upper surfaces of the first and second isolation regions,
the gate electrode fills the groove,
the gate electrode includes a metal material, and
the first and second source-drain regions respectively include low concentration impurity regions and high concentration impurity regions.
|