US 12,439,624 B2
Method of manufacturing semiconductor devices including forming an air gap based on removing a recessed sacrificial layer
Chih-Hung Sun, Hsinchu (TW); Po-Hsien Cheng, Hsinchu (TW); Zhen-Cheng Wu, Hsinchu (TW); and Chi-On Chui, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on May 16, 2022, as Appl. No. 17/745,124.
Prior Publication US 2023/0369462 A1, Nov. 16, 2023
Int. Cl. H10D 30/01 (2025.01); H10D 30/62 (2025.01); H10D 62/10 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/83 (2025.01)
CPC H10D 30/024 (2025.01) [H10D 30/6211 (2025.01); H10D 62/115 (2025.01); H10D 84/0151 (2025.01); H10D 84/0158 (2025.01); H10D 84/038 (2025.01); H10D 84/834 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor device, comprising:
forming a metal gate structure;
cutting the metal gate structure into two pieces of gate structures by forming a gate end space;
forming a first liner layer in the gate end space;
forming a sacrificial layer on the first liner layer;
recessing the sacrificial layer;
forming a second liner layer over the recessed sacrificial layer;
forming an air gap by removing the recessed sacrificial layer; and
forming a third liner layer over the second liner layer, at least a portion of the third liner layer being between the two pieces of gate structures within the gate end space,
wherein the third liner layer is made of at least one of silicon nitride, SiON, SiOCN, or SiCN.