US 12,439,621 B2
Method of making a charge coupled field effect rectifier diode
Shin Phay Lee, Singapore (SG); Voon Cheng Ngwan, Singapore (SG); Frederic Lanois, Tours (FR); Fadhillawati Tahir, Singapore (SG); and Ditto Adnan, Singapore (SG)
Assigned to STMicroelectronics PTE LTD, Singapore (SG); and STMicroelectronics (Tours) SAS, Tours (FR)
Filed by STMicroelectronics PTE LTD, Singapore (SG); and STMicroelectronics (Tours) SAS, Tours (FR)
Filed on Apr. 27, 2022, as Appl. No. 17/730,895.
Claims priority of provisional application 63/197,599, filed on Jun. 7, 2021.
Prior Publication US 2022/0393022 A1, Dec. 8, 2022
Int. Cl. H10D 12/00 (2025.01); H10D 12/01 (2025.01); H10D 64/00 (2025.01)
CPC H10D 12/211 (2025.01) [H10D 12/021 (2025.01); H10D 64/117 (2025.01)] 26 Claims
OG exemplary drawing
 
1. A method, comprising:
forming a trench in a semiconductor substrate which provides a cathode region of a field effect rectifier diode (FERD);
lining the trench with a first insulation layer;
depositing a hard mask layer on the first insulation layer;
performing an etch controlled by the hard mask layer to selectively remove a first portion of the first insulating layer from an upper portion of the trench while leaving a second portion of first insulating layer in a lower portion of the trench;
removing the hard mask layer from the trench;
lining an upper portion of the trench with a second insulation layer that extends from the second portion of first insulating layer;
wherein an opening in the trench includes a lower open portion delimited by the second portion of first insulating layer in the lower portion of the trench and an upper open portion delimited by the second insulation layer at the upper portion of the trench;
making a single deposition of polysilicon material in the trench to fill said opening in the trench;
wherein said polysilicon material filling the opening forms a unitary conductive structure in the trench comprising: a field plate of the FERD insulated from the semiconductor substrate by the second portion of first insulating layer and a gate of the FERD insulated from the semiconductor substrate by the second insulating layer;
implanting and activating a first type dopant in the semiconductor substrate to form a body region of the FERD; and
implanting and activating a second type dopant in the semiconductor substrate to form a source region of the FERD.