| CPC H10B 43/35 (2023.02) [G11C 16/0483 (2013.01); H01L 23/5283 (2013.01); H10B 41/10 (2023.02); H10B 41/27 (2023.02); H10B 41/35 (2023.02); H10B 41/40 (2023.02); H10B 43/10 (2023.02); H10B 43/27 (2023.02); H10B 43/40 (2023.02)] | 20 Claims |
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1. A semiconductor device, comprising:
an electrode structure comprising electrodes stacked on a substrate, and an insulating pattern on an uppermost electrode of the electrodes;
a vertical structure that penetrates the electrode structure and is electrically connected to the substrate, the vertical structure comprising a vertical semiconductor pattern and a conductive pad on the vertical semiconductor pattern;
a first insulating layer on the electrode structure and the vertical structure, wherein the insulating pattern is between the first insulating layer and the uppermost electrode;
a capping pattern on the conductive pad between the first insulating layer and the conductive pad, the capping pattern comprising a different material than the first insulating layer;
a conductive pattern that penetrates the first insulating layer and the capping pattern, and is electrically connected to the vertical structure;
an upper horizontal electrode on the conductive pattern;
an upper separation pattern that crosses the upper horizontal electrode in a first direction; and
an upper semiconductor pattern that penetrates the upper horizontal electrode and is electrically connected to the conductive pattern,
wherein the conductive pattern has a first side surface on the vertical structure and a second side surface on the insulating pattern, and
the upper separation pattern is vertically overlapping with the vertical structure.
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