| CPC H10B 10/12 (2023.02) | 17 Claims |

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1. A method for fabricating a static random access memory (SRAM), comprising:
forming a first fin-shaped structure for a first pull-down (PD) transistor on a substrate;
forming a second fin-shaped structure for a second PD transistor on the substrate, wherein the first fin-shaped structure and the second fin-shaped structure comprise a first recess therebetween;
forming a third fin-shaped structure for a first pass gate (PG) transistor on the substrate; and
forming a fourth fin-shaped structure for a second PG transistor on the substrate, wherein the third fin-shaped structure and the fourth fin-shaped structure comprise no recess therebetween.
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