US 12,439,529 B2
Plurality of build-up layers in a circuit board structure
Shao-Chien Lee, Taoyuan (TW); Ching-Sheng Chen, Taoyuan (TW); Heng-Ming Nien, Taoyuan (TW); and Pei-Wei Wang, Taoyuan (TW)
Assigned to UNIMICRON TECHNOLOGY CORP., Taoyuan (TW)
Filed by UNIMICRON TECHNOLOGY CORP., Taoyuan (TW)
Filed on Aug. 30, 2022, as Appl. No. 17/899,467.
Claims priority of application No. 111126634 (TW), filed on Jul. 15, 2022.
Prior Publication US 2024/0023251 A1, Jan. 18, 2024
Int. Cl. H05K 3/46 (2006.01); H01L 21/48 (2006.01); H01L 23/498 (2006.01); H05K 1/02 (2006.01); H05K 1/11 (2006.01); H05K 3/40 (2006.01)
CPC H05K 3/4679 (2013.01) [H01L 21/4857 (2013.01); H01L 23/49822 (2013.01); H05K 1/0298 (2013.01); H05K 1/113 (2013.01); H05K 1/116 (2013.01); H05K 3/4046 (2013.01); H05K 3/4602 (2013.01); H05K 2203/016 (2013.01); H05K 2203/1131 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A manufacturing method for circuit board structure, comprising:
providing a carrier;
forming a first build-up layer on the carrier, wherein the first build-up layer comprises a plurality of first circuits;
forming a second build-up layer on a side of the first build-up layer located away from the carrier, wherein the second build-up layer comprises a plurality of second circuits, and the plurality of first circuits are finer than the plurality of second circuits;
attaching a side of the second build-up layer located away from the first build-up layer to a core layer;
removing the carrier from the first build-up layer and wherein the at least one first conductive via and the at least one second conductive via are tapered towards a direction away from the core layer.