| CPC H04W 72/02 (2013.01) [H04W 72/0453 (2013.01); H04W 72/1263 (2013.01); H04W 72/23 (2023.01); H04W 72/56 (2023.01); H04W 72/566 (2023.01)] | 39 Claims |

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1. An apparatus for wireless communication at a first device, comprising:
one or more memories; and
one or more processors coupled with the one or more memories and configured to cause the first device to:
receive an indication of one or more logical channel prioritization restrictions corresponding to a sidelink communication link between the first device and a second device, the one or more logical channel prioritization restrictions based at least in part on an identity of the second device;
transmit, over the sidelink communication link, the indication of the one or more logical channel prioritization restrictions; and
communicate over the sidelink communication link in accordance with the one or more logical channel prioritization restrictions.
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