US 12,439,219 B2
Signal processing device and signal processing method
Akira Harada, Kanagawa (JP); and Hiroyuki Ehara, Kanagawa (JP)
Assigned to PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA, Torrance, CA (US)
Appl. No. 18/271,795
Filed by Panasonic Intellectual Property Corporation of America, Torrance, CA (US)
PCT Filed Oct. 15, 2021, PCT No. PCT/JP2021/038178
§ 371(c)(1), (2) Date Jul. 11, 2023,
PCT Pub. No. WO2022/153632, PCT Pub. Date Jul. 21, 2022.
Claims priority of provisional application 63/141,198, filed on Jan. 25, 2021.
Claims priority of provisional application 63/138,648, filed on Jan. 18, 2021.
Claims priority of application No. 2021-078567 (JP), filed on May 6, 2021.
Prior Publication US 2024/0064483 A1, Feb. 22, 2024
Int. Cl. H04R 5/00 (2006.01); H04S 7/00 (2006.01)
CPC H04S 7/30 (2013.01) 8 Claims
OG exemplary drawing
 
1. A signal processing apparatus, comprising:
detection circuitry, which, in operation, detects a time change of an inter-channel time difference of a stereo signal based on an inter-channel phase difference of the stereo signal;
control circuitry, which, in operation, controls a degree of smoothing of an inter-channel cross correlation, based on the time change of the inter-channel time difference; and
estimation circuitry, which, in operation, estimates the inter-channel time difference, based on the inter-channel cross correlation for which the degree of smoothing is controlled.