| CPC H04L 9/3278 (2013.01) [G06F 21/72 (2013.01); G09C 1/00 (2013.01); H04L 2209/12 (2013.01)] | 20 Claims |

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1. An electronic device, comprising:
a memory array having a plurality of memory cells, wherein each of the plurality of memory cells is configured to store either a first logical value or a second logical value in an unprogrammed mode of operation; and
physical unclonable function (PUF) circuitry configured to:
read a plurality of bits of information stored in the plurality of memory cells when the plurality of memory cells are operating in the unprogrammed mode of operation, the PUF circuity being configured to read the first logical value from a corresponding memory cell from among the plurality of memory cells in response to a first electronic circuit of the corresponding memory cell having a stronger response than a second electronic circuit of the corresponding memory cell or the second logical value from the corresponding memory cell in response to the second electronic circuit having the stronger response than the first electronic circuit,
designate a first grouping of the plurality of bits of information to a first response, and
assign the first response to a first challenge to provide a first challenge-response pair from among a plurality of challenge-response pairs to further configure the PUF circuitry to provide the first grouping of the plurality of bits of information of the first response in response to the electronic device receiving the first challenge.
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