US 12,438,551 B2
Analog-to-digital converter
Shotaro Wada, Nisshin (JP); Tomohiro Nezuka, Nisshin (JP); and Yoshikazu Furuta, Nisshin (JP)
Assigned to DENSO CORPORATION, Kariya (JP); TOYOTA JIDOSHA KABUSHIKI KAISHA, Toyota (JP); and MIRISE Technologies Corporation, Nisshin (JP)
Filed by DENSO CORPORATION, Kariya (JP); TOYOTA JIDOSHA KABUSHIKI KAISHA, Toyota (JP); and MIRISE Technologies Corporation, Nisshin (JP)
Filed on Dec. 21, 2023, as Appl. No. 18/391,789.
Claims priority of application No. 2023-012067 (JP), filed on Jan. 30, 2023.
Prior Publication US 2024/0259030 A1, Aug. 1, 2024
Int. Cl. H03M 1/44 (2006.01); H03M 1/18 (2006.01)
CPC H03M 1/442 (2013.01) [H03M 1/181 (2013.01)] 12 Claims
OG exemplary drawing
 
1. An analog-to-digital converter comprising:
an input-signal chopping switch;
an integrator being located after the input-signal chopping switch, the integrator including an operational amplifier, an integral capacitor, and a capacitor-chopping input switch, the capacitor-chopping input switch being located on an input side of the integral capacitor;
at least one output-side chopping switch being located on an output side of the operational amplifier;
a quantizer being located after the at least one output-side chopping switch; and
a feedback chopping switch located in a feedback path from an output of the quantizer to an input of the integrator, wherein:
the input-signal chopping switch, the at least one output-side chopping switch, the feedback chopping switch, and the capacitor-chopping input switch are configured to execute chopping at an identical frequency; and
the at least one output-side chopping switch is further configured to set a polarity of an input value of the quantizer to be identical before and after the chopping.