| CPC H03F 1/0233 (2013.01) [H03F 1/56 (2013.01); H03F 3/245 (2013.01); H04B 1/04 (2013.01); H03F 2200/105 (2013.01); H03F 2200/222 (2013.01); H03F 2200/387 (2013.01); H03F 2200/451 (2013.01)] | 13 Claims |

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1. A power amplifier circuit comprising:
a multi-stage amplifier comprising a final-stage amplifier;
an envelope tracking (ET) terminal; and
an average power tracking (APT) terminal,
wherein the final-stage amplifier comprises a first unit amplifier and a second unit amplifier connected in parallel with each other,
wherein the first unit amplifier is connected to the ET terminal,
wherein the second unit amplifier is connected to the APT terminal,
wherein when a power level of a first signal that is input to the first unit amplifier becomes greater than or equal to a reference power level, the first unit amplifier is configured to amplify the first signal and to output a first amplified signal, and
wherein regardless of a power level of a second signal that is input to the second unit amplifier, the second unit amplifier is configured to amplify the second signal and to output a second amplified signal.
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