US 12,438,506 B1
Complementary current reuse even harmonic frequency multiplier
Jesse Moody, Cedar Crest, NM (US); and Travis Forbes, Overland Park, KS (US)
Assigned to National Technology & Engineering Solutions of Sandia, LLC, Albuquerque, NM (US)
Filed by National Technology & Engineering Solutions of Sandia, LLC, Albuquerque, NM (US)
Filed on Jan. 18, 2024, as Appl. No. 18/415,778.
Claims priority of provisional application 63/440,725, filed on Jan. 24, 2023.
Int. Cl. H03B 19/10 (2006.01); H03B 5/12 (2006.01); H03F 1/08 (2006.01); H03F 3/45 (2006.01)
CPC H03B 19/10 (2013.01) [H03B 5/1228 (2013.01); H03F 1/086 (2013.01); H03F 3/4521 (2013.01); H03F 2200/294 (2013.01); H03F 2200/451 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A device, comprising:
a complementary current reuse (CCR) even harmonic multiplier, including:
first and second PMOS transistors, drains of the first and second PMOS transistors coupled together at a first output node;
first and second NMOS transistors, drains of the first and second NMOS transistors coupled together at a second output node;
a first input node, the first input node coupled to gates of the first PMOS and first NMOS transistors; and
a second input node, the second input node coupled to gates of the second PMOS and second NMOS transistors;
wherein the first and second input nodes are adapted to receive an input signal at a frequency F0;
wherein the first and second output nodes are adapted to output an output signal at a frequency 2nF0, where n is a positive integer; and
wherein sizes of the first and second PMOS transistors and the first and second NMOS transistors are adapted to provide substantially equivalent transconductances.