| CPC H03B 19/10 (2013.01) [H03B 5/1228 (2013.01); H03F 1/086 (2013.01); H03F 3/4521 (2013.01); H03F 2200/294 (2013.01); H03F 2200/451 (2013.01)] | 19 Claims |

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1. A device, comprising:
a complementary current reuse (CCR) even harmonic multiplier, including:
first and second PMOS transistors, drains of the first and second PMOS transistors coupled together at a first output node;
first and second NMOS transistors, drains of the first and second NMOS transistors coupled together at a second output node;
a first input node, the first input node coupled to gates of the first PMOS and first NMOS transistors; and
a second input node, the second input node coupled to gates of the second PMOS and second NMOS transistors;
wherein the first and second input nodes are adapted to receive an input signal at a frequency F0;
wherein the first and second output nodes are adapted to output an output signal at a frequency 2nF0, where n is a positive integer; and
wherein sizes of the first and second PMOS transistors and the first and second NMOS transistors are adapted to provide substantially equivalent transconductances.
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