US 12,438,491 B2
Double-reference pulse-width modulation for torque minimization of AC machines
Anatolii Tcai, Nuremberg (DE); and Piniwan Thiwanka Bandara Wijekoon, Nuremberg (DE)
Assigned to Huawei Digital Power Technologies Co., Ltd., Shenzhen (CN)
Filed by Huawei Digital Power Technologies Co., Ltd., Shenzhen (CN)
Filed on Sep. 8, 2023, as Appl. No. 18/463,952.
Application 18/463,952 is a continuation of application No. PCT/EP2021/055877, filed on Mar. 9, 2021.
Prior Publication US 2023/0421088 A1, Dec. 28, 2023
Int. Cl. H02P 21/05 (2006.01); H02M 7/5395 (2006.01); H02P 21/04 (2006.01); H02P 23/03 (2006.01); H02P 27/08 (2006.01); H02P 27/14 (2006.01)
CPC H02P 27/085 (2013.01) [H02M 7/5395 (2013.01); H02P 21/04 (2013.01); H02P 23/03 (2013.01); H02P 27/14 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
generating a base reference signal for each of three or more reference phases;
determining a maximum reference (max) and a minimum reference (min) based on the base reference signal generated for each of the three or more reference phases;
calculating a reference sum of the maximum reference and the minimum reference;
generating a first offset by calculating the first offset to be 1−max when the reference sum is positive and −1−min when the reference sum is negative;
generating a second offset by calculating the second offset to be −1−min when the reference sum is positive and 1−max when the reference sum is negative;
for each of the three or more reference phases, performing the following, to obtain a set of multi-level pulse-width modulation (PWM) control signals:
generating an upper reference by adding the first offset to the base reference signal when the signal is positive and adding the second offset when the signal is negative;
generating a lower reference by adding the second offset to the base reference signal when the signal is positive and adding the first offset when the signal is negative;
comparing the upper reference to a triangular upper carrier signal to generate an upper PWM output;
comparing the lower reference to a triangular lower carrier signal to generate a lower PWM output; and
combining the upper PWM output and lower PWM output to generate a multi-level PWM control signal for the respective reference phase that is comprised in the set of multi-level PWM control signals; and
outputting the set of multi-level PWM control signals generated for the three or more reference phases to a multi-level power converter.