US 12,438,452 B2
Implementing power factor correction with single-stage flyback converters operating with a variable switching frequency
Rashed Ahmed, Cedar Park, CA (US); Harish Subramanya, El Segundo, CA (US); Ganesh Subramaniam, Cupertino, CA (US); and Madhan Kumar Kuppaswamy, Bangalore (IN)
Assigned to Cypress Semiconductor Corporation, San Jose, CA (US)
Filed by Cypress Semiconductor Corporation, San Jose, CA (US)
Filed on Jun. 16, 2023, as Appl. No. 18/336,695.
Claims priority of provisional application 63/446,994, filed on Feb. 20, 2023.
Prior Publication US 2024/0283352 A1, Aug. 22, 2024
Int. Cl. H02M 3/335 (2006.01); H02M 1/00 (2006.01); H02M 1/42 (2007.01); H02M 3/00 (2006.01)
CPC H02M 1/4266 (2013.01) [H02M 1/0009 (2021.05); H02M 1/007 (2021.05); H02M 3/003 (2021.05); H02M 3/33515 (2013.01); H02M 3/33507 (2013.01); H02M 3/33523 (2013.01)] 19 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a flyback converter configured to operate with a variable switching frequency, the flyback converter comprising:
a signal transformer;
a primary side comprising a primary-side controller coupled to the signal transformer; and
a secondary side comprising a secondary-side controller coupled to the signal transformer, wherein the secondary-side controller is configured at least to cause a control signal to be generated based on a set of parameters, and wherein the control signal controls power factor correction (PFC) for the flyback converter;
wherein the flyback converter is a single-stage flyback converter operating with the variable switching frequency in a critical conduction mode (CrCM).