| CPC H01L 25/16 (2013.01) [H01L 23/481 (2013.01); H01L 23/5223 (2013.01); H01L 23/5227 (2013.01); H01L 23/64 (2013.01); H01L 23/642 (2013.01); H02M 3/07 (2013.01); H05K 1/0298 (2013.01); H05K 1/115 (2013.01); H10D 1/68 (2025.01); H10D 1/716 (2025.01); H10D 86/85 (2025.01); H10D 88/00 (2025.01); H10N 19/00 (2023.02); H01L 2224/0401 (2013.01); H01L 2224/0554 (2013.01); H01L 2224/0557 (2013.01); H01L 2224/05572 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/16265 (2013.01); H01L 2924/19103 (2013.01); H01L 2924/19104 (2013.01); H01L 2924/19105 (2013.01); H02M 3/077 (2021.05)] | 20 Claims |

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1. An integrated circuit (IC) comprising:
a plurality of switched-capacitor partitions configured to be coupled to a plurality of pump capacitors, wherein the plurality of switched-capacitor partitions comprise:
a first partition comprising:
a first switch; and
a second switch; and
a second partition comprising:
a third switch; and
a fourth switch, wherein the first partition and the second partition are disposed substantially symmetric with respect to an axis.
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