US 12,438,131 B2
Display apparatus
Wei-Sheng Su, New Taipei (TW); and Chia-Hsin Chao, Hsinchu County (TW)
Assigned to Industrial Technology Research Institute, Hsinchu (TW)
Filed by Industrial Technology Research Institute, Hsinchu (TW)
Filed on Dec. 26, 2021, as Appl. No. 17/561,991.
Claims priority of provisional application 63/194,189, filed on May 28, 2021.
Claims priority of application No. 110143969 (TW), filed on Nov. 25, 2021.
Prior Publication US 2022/0384396 A1, Dec. 1, 2022
Int. Cl. H10K 59/13 (2023.01); H01L 25/075 (2006.01); H10H 20/857 (2025.01); H10H 20/858 (2025.01); H10K 59/131 (2023.01)
CPC H01L 25/0753 (2013.01) [H10H 20/857 (2025.01); H10H 20/8581 (2025.01); H10K 59/131 (2023.02)] 13 Claims
OG exemplary drawing
 
1. A display apparatus, comprising:
a transparent substrate;
a plurality of display modules, disposed on the transparent substrate, wherein each of the plurality of display modules comprises:
a first circuit board, having a first surface and a second surface opposite to each other, and disposed on the transparent substrate with the first surface facing the transparent substrate;
a plurality of light emitting diode (LED) devices, disposed on the first surface and electrically connected to the first circuit board; and
a molding layer, disposed on the first surface to cover the plurality of LED devices;
an interconnect, disposed in the first circuit board and on the second surface to electrically connect the plurality of display modules to each other;
a cap layer, covering the plurality of display modules and the interconnect; and
a control device, electrically connected to a portion of the interconnect adjacent to the edge of the transparent substrate,
wherein the interconnect comprises:
a circuit layer, disposed on the second surface to connect two adjacent display modules; and
a conductive via, disposed in the first circuit board to electrically connect the circuit layer and the plurality of LED devices, and
wherein an optical glue is located between the interconnect and the second surface, and located between two adjacent conductive vias respectively in two adjacent first circuit boards.