US 12,438,120 B2
Chip package structure with redistribution layer having bonding portion
Chih-Hang Tung, Hsinchu (TW); Tung-Liang Shao, Hsinchu (TW); Su-Chun Yang, Hsinchu County (TW); Geng-Ming Chang, Taichung (TW); and Chen-Hua Yu, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jul. 2, 2021, as Appl. No. 17/366,446.
Application 17/366,446 is a division of application No. 16/373,900, filed on Apr. 3, 2019, granted, now 11,056,459.
Claims priority of provisional application 62/718,799, filed on Aug. 14, 2018.
Prior Publication US 2021/0335750 A1, Oct. 28, 2021
Int. Cl. H01L 23/00 (2006.01)
CPC H01L 24/80 (2013.01) [H01L 24/08 (2013.01); H01L 24/24 (2013.01); H01L 2224/02331 (2013.01); H01L 2224/02381 (2013.01); H01L 2224/24105 (2013.01); H01L 2224/24147 (2013.01); H01L 2224/80004 (2013.01); H01L 2224/80143 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A chip package structure, comprising:
a first redistribution layer having a bonding portion, wherein the bonding portion comprises a first dielectric layer;
a chip structure bonded to the bonding portion, wherein a first width of the first dielectric layer of the bonding portion is substantially equal to a second width of the chip structure, the chip structure comprises a semiconductor substrate and a second dielectric layer, and the second dielectric layer is connected between the semiconductor substrate and the first dielectric layer; and
a protective layer over the first redistribution layer and surrounding the chip structure, wherein a portion of the protective layer extends into the first redistribution layer and surrounds the bonding portion, and the portion of the protective layer is in direct contact with a first sidewall of the first dielectric layer of the bonding portion, and
the chip structure comprises:
a second redistribution layer under the semiconductor substrate, wherein the second redistribution layer has a second bonding portion and a second portion between the second bonding portion and the semiconductor substrate, the second bonding portion is narrower than the second portion, and the second bonding portion is in direct contact with the bonding portion.