US 12,438,111 B2
Semiconductor device, wafer, and wafer manufacturing method
Yasunori Iwashita, Yokkaichi Mie (JP); Shinya Arai, Yokkaichi Mie (JP); Keisuke Nakatsuka, Kobe Hyogo (JP); and Hiroaki Ashidate, Mie Mie (JP)
Assigned to KIOXIA CORPORATION, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on Sep. 1, 2022, as Appl. No. 17/901,448.
Prior Publication US 2023/0307396 A1, Sep. 28, 2023
Int. Cl. H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01); H01L 25/18 (2023.01)
CPC H01L 24/08 (2013.01) [H01L 24/06 (2013.01); H01L 24/80 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 2224/06517 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/14511 (2013.01); H01L 2924/3511 (2013.01)] 6 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a first stacked body; and
a second stacked body bonded to the first stacked body,
wherein the first stacked body includes:
a first wiring; and
a first pad disposed on a first bonding surface, the first stacked body and the second stacked body bonded to the first bonding surface, and electrically connected to the first wiring via a first via,
wherein the second stacked body includes:
a second wiring; and
a second pad electrically connected to the second wiring via a second via, the second pad bonded to the first pad, and
wherein a direction from the first stacked body to the second stacked body is a first direction, a direction intersecting with the first direction is a second direction, and a direction intersecting with the first direction and the second direction is a third direction, and
when a dimension of the first pad in the third direction is PX1, the dimension of the first pad in the second direction is PY1, a dimension of the second pad in the third direction is PX2, and the dimension of the second pad in the second direction is PY2, the dimension of the first pad and the dimension of the second pad satisfy at least one of Equations (1) or (2) below,
PX1>PY1  (1), or
PY2>PX2  (2).