| CPC H01L 23/535 (2013.01) [H01L 23/5283 (2013.01); H10B 41/27 (2023.02); H10B 41/41 (2023.02); H10B 43/27 (2023.02); H10B 43/40 (2023.02)] | 16 Claims |
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1. A semiconductor device comprising:
a stepped connection portion having a plurality of conductive pad portions disposed on a substrate;
an insulating block covering the plurality of conductive pad portions, wherein the insulating block has a first surface and a second surface, wherein the first surface faces the stepped connection portion, wherein the second surface is flat and extends in a direction parallel to a first surface of the substrate, wherein the insulating block includes a silicon oxide film doped with a dopant element including a metalloid element or a non-metal element, wherein the dopant element has an atomic weight within a range of 5 to 15; and
a first plug structure passing through the insulating block in a vertical direction with respect to the first surface of substrate,
wherein the first plug structure includes:
a memory cell contact electrically connected to one conductive pad portion of the plurality of conductive pad portions, and
a through-electrode passing through the insulating block and at least one conductive pad portion of the plurality of conductive pad portions in the vertical direction and configured not to be electrically connected to the plurality of conductive pad portions,
wherein a first surface of the memory cell contact and a first surface of the through-electrode are at a same vertical level with respect to the first surface of the substrate, and
a doping concentration of the dopant element in the insulating block is from about 0.1 atom % to about 2 atom %.
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