US 12,438,087 B2
High throughput additive manufacturing for integrated circuit components containing traces with feature size and grain boundaries
Adel Elsherbini, Chandler, AZ (US); Aleksandar Aleksov, Chandler, AZ (US); Feras Eid, Chandler, AZ (US); Wenhao Li, Chandler, AZ (US); Stephen Morein, San Jose, CA (US); and Yoshihiro Tomita, Tsukuba (JP)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Sep. 24, 2021, as Appl. No. 17/484,281.
Prior Publication US 2023/0099827 A1, Mar. 30, 2023
Int. Cl. H01L 23/532 (2006.01); H01L 21/768 (2006.01)
CPC H01L 23/53238 (2013.01) [H01L 21/76801 (2013.01); H01L 21/7684 (2013.01); H01L 21/76841 (2013.01)] 25 Claims
OG exemplary drawing
 
1. An integrated circuit component comprising:
a substrate; and
one or more conductive traces on the substrate,
wherein individual conductive traces of the one or more conductive traces have a feature size less than 50 micrometers,
wherein individual conductive traces of the one or more conductive traces comprise a plurality of grains separated by grain boundaries, wherein individual grains of the plurality of grains of individual conductive traces of the one or more conductive traces have a diameter between 10 and 100 micrometers,
wherein individual conductive traces of the one or more conductive traces have a thickness of at least 50 micrometers.