US 12,438,077 B2
Damascene interconnect spacer to facilitate gap fill
Nicholas Anthony Lanzillo, Wynantskill, NY (US); Timothy Mathew Philip, Albany, NY (US); and Kevin W. Brew, Niskayuna, NY (US)
Assigned to International Business Machines Corporation, Armonk, NY (US)
Filed by International Business Machines Corporation, Armonk, NY (US)
Filed on Nov. 10, 2021, as Appl. No. 17/454,378.
Prior Publication US 2023/0144842 A1, May 11, 2023
Int. Cl. H01L 23/522 (2006.01); H01L 21/768 (2006.01); H01L 23/532 (2006.01)
CPC H01L 23/5226 (2013.01) [H01L 21/76829 (2013.01); H01L 21/76843 (2013.01); H01L 21/76871 (2013.01); H01L 23/53238 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A semiconductor component, comprising:
a dielectric layer including an opening;
a liner arranged in the opening in direct contact with the dielectric layer;
a wetting layer arranged in the opening in direct contact with the liner;
an interconnect structure arranged in the opening in direct contact with the wetting layer; and
a cap arranged in the opening in direct contact with the interconnect structure and separated from the wetting layer by a spacer, wherein a lowermost surface of the spacer is in direct contact with an uppermost surface of the wetting layer.