US 12,438,069 B2
Semiconductor power module package having lead frame anchored bars
Zhiqiang Niu, Santa Clara, CA (US); Bum-Seok Suh, Seongnam (KR); Junho Lee, Suwon-si (KR); Jong-Mu Lee, Yongin-si (KR); Jun Lu, San Jose, CA (US); and Xiaorong Ge, Pleasanton, CA (US)
Assigned to ALPHA AND OMEGA SEMICONDUCTOR INTERNATIONAL LP, Toronto (CA)
Filed by ALPHA AND OMEGA SEMICONDUCTOR INTERNATIONAL LP, Toronto (CA)
Filed on Apr. 18, 2022, as Appl. No. 17/722,682.
Prior Publication US 2023/0335474 A1, Oct. 19, 2023
Int. Cl. H01L 23/495 (2006.01); H01L 23/00 (2006.01); H03K 17/567 (2006.01); H03K 17/687 (2006.01)
CPC H01L 23/49575 (2013.01) [H01L 23/49503 (2013.01); H01L 23/49555 (2013.01); H01L 23/49562 (2013.01); H01L 24/16 (2013.01); H01L 2224/48177 (2013.01); H03K 17/567 (2013.01); H03K 17/6871 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A semiconductor power module package comprising:
a lead frame comprising
a first lead frame anchored bar;
a second lead frame anchored bar;
a first plurality of lead frame leads; and
a second plurality of lead frame leads;
a substrate mounted on the lead frame;
a first anchor pad on the substrate, the first anchor pad being attached to the first lead frame anchored bar;
a second anchor pad on the substrate, the second anchor pad being attached to the second lead frame anchored bar;
a plurality of die pads on the substrate;
a plurality of transistor dies on the plurality of die pads;
a first integrated circuit (IC) pad on the substrate; and
a first control IC die on the first IC pad;
wherein the plurality of die pads comprises
a first die pad;
a second die pad;
a third die pad; and
a fourth die pad; and
wherein the plurality of transistor dies comprises
a first transistor die disposed on the first die pad;
a second transistor die disposed on the second die pad;
a third transistor die disposed on the third die pad; and
a fourth transistor die, a fifth transistor die, and a sixth transistor die disposed on the fourth die pad;
wherein the substrate further comprises
a first edge;
a second edge opposite the first edge;
a third edge; and
a fourth edge opposite the third edge;
wherein the first die pad, the second die pad, the third die pad, and the fourth die pad are separated from one another and are positioned in sequence between the first edge of the substrate and the second edge of the substrate;
wherein a distance between the first die pad and the first edge of the substrate is smaller than a distance between the fourth die pad and the first edge of the substrate;
wherein the first plurality of lead frame leads are disposed along the third edge of the substrate;
wherein the second plurality of lead frame leads are disposed along the fourth edge of the substrate;
wherein the first IC pad is disposed between the third edge of the substrate and at least a portion of the fourth die pad;
wherein a distance between the first anchor pad and the third edge of the substrate is smaller than a distance between the first anchor pad and the fourth edge of the substrate; and
wherein a distance between the second anchor pad and the third edge of the substrate is smaller than a distance between the second anchor pad and the fourth edge of the substrate.