US 12,438,056 B2
Semiconductor device and method for determining deterioration of semiconductor device
Motohito Hori, Matsumoto (JP); Yoshinari Ikeda, Matsumoto (JP); Takaaki Tanaka, Hachioji (JP); and Qichen Wang, Hino (JP)
Assigned to FUJI ELECTRIC CO., LTD., Kawasaki (JP)
Filed by FUJI ELECTRIC CO., LTD., Kawasaki (JP)
Filed on Mar. 9, 2023, as Appl. No. 18/181,171.
Claims priority of application No. 2022-078568 (JP), filed on May 12, 2022.
Prior Publication US 2023/0369142 A1, Nov. 16, 2023
Int. Cl. H01L 23/00 (2006.01); G01R 31/28 (2006.01); H01L 21/66 (2006.01); H01L 23/049 (2006.01); H01L 23/373 (2006.01); H01L 25/07 (2006.01); H01L 25/18 (2023.01)
CPC H01L 22/32 (2013.01) [G01R 31/2851 (2013.01); H01L 23/049 (2013.01); H01L 23/3735 (2013.01); H01L 24/48 (2013.01); H01L 25/072 (2013.01); H01L 25/18 (2013.01); H01L 2224/48139 (2013.01); H01L 2924/12031 (2013.01); H01L 2924/12032 (2013.01); H01L 2924/13055 (2013.01); H01L 2924/13091 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a plurality of first semiconductor chips, each of which includes a first output electrode on a front surface thereof and a first input electrode on a rear surface thereof;
a first input conductive plate on which the plurality of first semiconductor chips are arranged in a first direction and to which the first input electrodes of the plurality of first semiconductor chips are bonded;
a first output conductive plate extending in the first direction and being provided adjacent to the first input conductive plate in a second direction orthogonal to the first direction;
a case having first to fourth side walls, the first and third side walls each extending in the first direction, the second and fourth side walls each extending in the second direction, the case accommodating the first input conductive plate and the first output conductive plate;
first main current wiring members, each of which connects one of the first output electrodes of the plurality of first semiconductor chips to a front surface of the first output conductive plate;
a first detection terminal disposed in the first side wall, the first output conductive plate being disposed closer to the first side wall than is the first input conductive plate; and
a first detection wiring member which connects the front surface of the first output conductive plate to the first detection terminal.