US 12,438,004 B2
Method for forming semiconductor device that includes flash memory
Yu-Jen Huang, Taichung (TW); Chu-Chun Hsieh, Taichung (TW); and Hsiu-Han Liao, Hsinchu (TW)
Assigned to WINBOND ELECTRONICS CORP., Taichung (TW)
Filed by Winbond Electronics Corp., Taichung (TW)
Filed on Sep. 23, 2022, as Appl. No. 17/951,494.
Claims priority of application No. 111108722 (TW), filed on Mar. 10, 2022.
Prior Publication US 2023/0290642 A1, Sep. 14, 2023
Int. Cl. H01L 21/311 (2006.01); H01L 21/762 (2006.01); H10B 41/30 (2023.01)
CPC H01L 21/31111 (2013.01) [H01L 21/76224 (2013.01); H10B 41/30 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A method for forming a semiconductor device, comprising:
providing a semiconductor substrate with a plurality of floating gates thereon and an isolation structure between the plurality of floating gates;
performing a first etching process to recess the isolation structure and form an opening between the plurality of floating gates to expose a portion of sidewalls of the plurality of floating gates;
conformally forming a liner in the opening;
performing an ion implantation process to implant a dopant into the liner and the isolation structure below the liner; and
performing a second etching process to remove the liner and a portion of the isolation structure below the liner, thereby forming a tapered profile at a bottom portion of the opening.