| CPC H01L 21/02502 (2013.01) [H01L 21/02488 (2013.01); H01L 21/02491 (2013.01); H01L 21/02496 (2013.01); H01L 21/02505 (2013.01); H01L 21/02513 (2013.01); H01L 21/02516 (2013.01); H01L 21/02598 (2013.01); H01L 21/02192 (2013.01); H01L 21/02266 (2013.01); H01L 21/02422 (2013.01); H01L 21/02425 (2013.01); H01L 21/02458 (2013.01); H01L 21/02461 (2013.01); H01L 21/02463 (2013.01); H01L 21/0254 (2013.01); H01L 21/02543 (2013.01); H01L 21/02546 (2013.01); H01L 21/02609 (2013.01); H01L 21/0262 (2013.01); H01L 21/02631 (2013.01)] | 18 Claims |

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1. A single crystal semiconductor structure comprising:
a strain compensation layer;
an amorphous substrate on the strain compensation layer;
a lattice matching layer on the amorphous substrate, the lattice matching layer comprising two or more single crystal layers;
a single crystal semiconductor layer on the lattice matching layer; and
a mask pattern between the single crystal semiconductor layer and the lattice matching layer,
wherein the lattice matching layer comprises a direction control film disposed on the amorphous substrate, the direction control film comprising a single crystal structure, and a buffer layer comprising a material different from a material of the direction control film, the buffer layer being disposed on the direction control film and comprising a single crystal structure,
wherein the mask pattern comprises holes exposing the lattice matching layer, and
wherein the single crystal semiconductor layer is disposed on the mask pattern and fills the holes.
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