US 12,437,834 B2
Operation method of memory, memory and memory system
Zhefan Li, Wuhan (CN); Xiaodong Mei, Wuhan (CN); Huangpeng Zhang, Wuhan (CN); and Yu Wang, Wuhan (CN)
Assigned to Yangtze Memory Technologies Co., Ltd., Wuhan (CN)
Filed by Yangtze Memory Technologies Co., Ltd., Hubei (CN)
Filed on Oct. 26, 2023, as Appl. No. 18/495,696.
Claims priority of application No. 202311000894.X (CN), filed on Aug. 9, 2023.
Prior Publication US 2025/0054565 A1, Feb. 13, 2025
Int. Cl. G11C 29/00 (2006.01)
CPC G11C 29/883 (2013.01) 20 Claims
OG exemplary drawing
 
1. An operation method of a memory performed in a post-package repair (PPR) mode, wherein the method comprises:
determining that a first defective memory cell row of a plurality of memory cell rows in the memory was repaired pre-packaging before based on a first repair strategy for repairing the first defective memory cell row before packaging the memory to an electronic device;
in response to the determination that the first defective memory cell row was repaired pre-packaging, setting a first control bit to a first preset value indicating that the first repair strategy is invalid;
configuring a second repair strategy for repairing the first defective memory cell row by setting a second control bit to a second preset value indicating that the second repair strategy is valid; and
storing the second repair strategy to the memory.