US 12,437,813 B2
Method of reducing program operation time in 3D NAND memory systems
XiangNan Zhao, Hubei (CN); and HongTao Liu, Hubei (CN)
Assigned to Yangtze Memory Technologies Co., Ltd., Hubei (CN)
Filed by Yangtze Memory Technologies Co., Ltd., Hubei (CN)
Filed on Mar. 20, 2023, as Appl. No. 18/186,596.
Claims priority of application No. 202310204300.0 (CN), filed on Mar. 1, 2023.
Prior Publication US 2024/0296889 A1, Sep. 5, 2024
Int. Cl. G11C 16/14 (2006.01); G11C 16/04 (2006.01); G11C 16/10 (2006.01)
CPC G11C 16/10 (2013.01) [G11C 16/0483 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A method of operating a memory device having memory cells, the method comprising:
performing a first programming to a memory cell of the memory device with a first step voltage value;
determining that a step voltage increase condition is met; and
performing a second programming to the memory cell with a second step voltage value, wherein the second step voltage value is greater than the first step voltage value by an incremental voltage value.