US 12,437,388 B2
System and method for computer inspection of surface-mount devices
Navid Asadi-Zanjani, Gainesville, FL (US); Mark M. Tehranipoor, Gainesville, FL (US); Nathan Jessurun, Gainesville, FL (US); and Jacob C. Harrison, Gainesville, FL (US)
Assigned to University of Florida Research Foundation, Incorporated, Gainesville, FL (US)
Filed by University of Florida Research Foundation, Incorporated, Gainesville, FL (US)
Filed on Jun. 2, 2023, as Appl. No. 18/328,306.
Claims priority of provisional application 63/365,966, filed on Jun. 7, 2022.
Prior Publication US 2023/0394645 A1, Dec. 7, 2023
Int. Cl. G06K 9/00 (2022.01); G06T 7/00 (2017.01); G06T 7/11 (2017.01); G06T 7/564 (2017.01)
CPC G06T 7/0004 (2013.01) [G06T 7/11 (2017.01); G06T 7/564 (2017.01); G06T 2207/20081 (2013.01); G06T 2207/30141 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, in a data processing system comprising a processor and a memory, for identifying surface-mount device (“SMD”) pin locations, the method comprising:
receiving, by one or more processors, input contour data associated with a SMD;
determining, by the one or more processors, a plurality of bounding box quadrants for the input contour data;
aligning, by the one or more processors, a bounding box around a body of the SMD, wherein the bounding box comprises the plurality of bounding box quadrants;
extracting, by the one or more processors, pin profiles from the input contour data based on the alignment of the bounding box;
detecting, by the one or more processors, signal peak indices from the pin profiles;
mapping, by the one or more processors, the signal peak indices to pin locations associated with the SMD; and
generating, by the one or more processors, output contour data comprising the mapping.