| CPC G06N 10/70 (2022.01) [G06N 10/20 (2022.01); G06N 10/40 (2022.01)] | 20 Claims |
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1. A computing system comprising:
one or more processing devices configured to:
identify one or more severe hook faults in a stabilizer channel configured to be implemented at a quantum computing device, wherein identifying the one or more severe hook faults includes:
receiving a circuit channel check matrix of the stabilizer channel, wherein:
columns of the circuit channel check matrix indicate values of checks associated with respective elementary faults of the stabilizer channel;
the checks specify parities of respective measurement outcome subsets of outcome vector elements included in a channel outcome vector of the stabilizer channel; and
each of the checks indicates whether the corresponding elementary fault has occurred at the stabilizer channel;
receiving a phenomenological channel check matrix of the stabilizer channel as a sub-matrix of the circuit channel check matrix;
receiving a logical effect matrix of the stabilizer channel;
receiving a weight vector that indicates respective probability weights of the elementary faults; and
based at least in part on the circuit channel check matrix, the logical effect matrix, the phenomenological channel check matrix, and the weight vector, computing one or more column indices of respective columns of the circuit channel check matrix that correspond to the one or more severe hook faults;
output an indication of the one or more severe hook faults; and
perform quantum error correction at the quantum computing device based at least in part on the indication of the one or more severe hook faults.
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