| CPC G06N 3/04 (2013.01) [G06F 9/4881 (2013.01); G06F 9/5016 (2013.01); G06F 9/5038 (2013.01); G06F 9/544 (2013.01); G06F 2209/5017 (2013.01)] | 20 Claims |

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1. A neural processor circuit, comprising:
a neural engine circuit configured to perform a plurality of convolution operations of a plurality of layers in a streaming mode; and
a neural task manager configured to:
obtain a plurality of task descriptors and a plurality of subtask descriptors, each of the plurality of task descriptors identifying a respective set of the plurality of convolution operations of a respective layer of the plurality of layers, each of the plurality of subtask descriptors identifying a corresponding task descriptor of the plurality of task descriptors and a subset of the plurality of convolution operations on a portion of a layer of the plurality of layers identified by the corresponding task descriptor, and
configure the neural engine circuit for execution of the subset of the plurality of convolution operations using the corresponding task descriptor,
wherein, in the streaming mode, the neural engine circuit is configured to perform the subset of the plurality of convolution operations to generate output data that correspond to input data of another subset of the plurality of convolution operations identified by another subtask descriptor of the plurality of subtask descriptors.
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