US 12,437,133 B2
Property-driven automatic generation of reduced component hardware
Rakesh Kumar, Urbana, IL (US); and Nathaniel Lewis Bleier, Urbana, IL (US)
Assigned to The Board of Trustees of the University of Illinois, Urbana, IL (US)
Filed by The Board of Trustees of the University of Illinois, Urbana, IL (US)
Filed on Mar. 15, 2022, as Appl. No. 17/695,387.
Claims priority of provisional application 63/163,335, filed on Mar. 19, 2021.
Prior Publication US 2022/0302917 A1, Sep. 22, 2022
Int. Cl. G06F 30/30 (2020.01); G06F 9/30 (2018.01); G06F 9/38 (2018.01); G06F 30/327 (2020.01); G06F 30/3323 (2020.01); G06F 30/337 (2020.01); G06F 119/16 (2020.01); H03K 19/096 (2006.01)
CPC G06F 30/327 (2020.01) [G06F 9/3016 (2013.01); G06F 9/3836 (2013.01); G06F 30/3323 (2020.01); G06F 30/337 (2020.01); G06F 2119/16 (2020.01); H03K 19/096 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A computer-implemented method comprising:
obtaining a specification of connectivity between a plurality of electronic components, a property library of logical validations, and a set of restrictions for an execution environment of the electronic components, wherein each of the electronic components is associated with at least one of the logical validations;
determining that, according to properties in the property library applied to their associated electronic components, a subset of the electronic components exhibit invariance within the execution environment;
based on the subset of the electronic components that exhibit invariance within the execution environment, rewiring the connectivity between the plurality of electronic components; and
performing logic synthesis on the connectivity between the plurality of electronic components as rewired to simplify at least some of the subset of the electronic components that exhibit invariance within the execution environment.