US 12,437,076 B2
Security hardened processing device
Sergiu Ghetie, Hillsboro, OR (US)
Assigned to SDG Logic Inc., Hillsboro, OR (US)
Filed by SDG Logic Inc., Hillsboro, OR (US)
Filed on Sep. 12, 2023, as Appl. No. 18/465,885.
Application 18/465,885 is a continuation of application No. 16/934,690, filed on Jul. 21, 2020, granted, now 11,803,644.
Claims priority of provisional application 62/877,623, filed on Jul. 23, 2019.
Prior Publication US 2024/0265110 A1, Aug. 8, 2024
Int. Cl. G06F 21/57 (2013.01); H04L 9/30 (2006.01)
CPC G06F 21/575 (2013.01) [H04L 9/30 (2013.01); G06F 2221/034 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for securely booting a processing device of a computing system, the method comprising:
modifying a set of programmable fuses of the processing device to store a microcode patch that causes the processing device to access a firmware interface table stored in a non-volatile memory of the computing system;
loading, at a reset of the processing device and via the firmware interface table, an initialization patch from a non-volatile memory onto one or more cores of the processing device;
deriving, by the processing device, an encryption key through a one-way hash of the set of programmable fuses of the processing device and a one-way hash of the initialization patch, the encryption key comprising a plurality of public keys for a plurality of computing devices of the computing system and storing the encryption key in the non-volatile memory; and
authenticating, by the processing device, a basic input/output system (BIOS) initial boot block (IBB) stored in the non-volatile memory to perform a secure boot process of the processing device using a key derivation algorithm based on the derived encryption key.