US 12,436,912 B2
Disaggregated die with input/output (I/O) tiles
Andrew Paul Collins, Chandler, AZ (US); Mahesh Krishnappayya Kumashikar, Bangalore (IN); and Srikanth Nimmagadda, Bangalore (IN)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Mar. 22, 2024, as Appl. No. 18/613,256.
Application 18/613,256 is a continuation of application No. 16/799,192, filed on Feb. 24, 2020, abandoned.
Prior Publication US 2024/0232122 A1, Jul. 11, 2024
Int. Cl. G06F 13/42 (2006.01); G06F 9/38 (2018.01); G06F 13/40 (2006.01)
CPC G06F 13/4221 (2013.01) [G06F 9/3822 (2013.01); G06F 9/3869 (2013.01); G06F 9/3877 (2013.01); G06F 13/4027 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A microelectronic assembly, comprising:
a substrate;
a processor electrically coupled to the substrate, wherein the processor includes a first edge, a second edge, a third edge opposite the first edge, and a fourth edge opposite the second edge;
a first tile electrically coupled to the substrate adjacent to the second edge of the processor and communicatively coupled to the processor, wherein the first tile includes a fifth edge and a sixth edge opposite the fifth edge, and wherein the fifth edge of the first tile is aligned with the first edge of the processor and the sixth edge of the first tile extends beyond the third edge of the processor;
a second tile electrically coupled to the substrate adjacent to the third edge of the processor and communicatively coupled to the processor, wherein the second tile includes a seventh edge and an eighth edge opposite the seventh edge, and wherein the seventh edge of the second tile is aligned with the second edge of the processor and the eighth edge of the third tile extends beyond the fourth edge of the processor; and
a third tile electrically coupled to the substrate adjacent to the fourth edge of the processor and communicatively coupled to the processor, wherein the third tile includes a ninth edge and a tenth edge opposite the ninth edge, and wherein the ninth edge of the third tile is aligned with the third edge of the processor-and the tenth edge of the third tile extends beyond the first edge of the processor.