US 12,436,881 B2
Host accelerated operations in managed nand devices
Sebastien Andre Jean, Meridian, ID (US); and Greg A. Blodgett, Marsing, ID (US)
Filed by Lodestar Licensing Group, LLC, Evanston, IL (US)
Filed on Apr. 16, 2024, as Appl. No. 18/637,075.
Application 18/637,075 is a continuation of application No. 17/869,313, filed on Jul. 20, 2022, granted, now 11,983,106.
Application 17/869,313 is a continuation of application No. 17/051,995, granted, now 11,409,651, issued on Aug. 9, 2022, previously published as PCT/US2019/032463, filed on May 15, 2019.
Claims priority of provisional application 62/673,587, filed on May 18, 2018.
Prior Publication US 2025/0291713 A1, Sep. 18, 2025
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 12/02 (2006.01); G06F 3/06 (2006.01); G06F 12/14 (2006.01)
CPC G06F 12/0246 (2013.01) [G06F 3/0623 (2013.01); G06F 3/064 (2013.01); G06F 3/0653 (2013.01); G06F 3/0679 (2013.01); G06F 12/0292 (2013.01); G06F 12/1408 (2013.01); G06F 2212/7201 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A memory device comprising:
a memory array comprising a memory logical-to-physical (L2P) table stored therein; and
a controller coupled to the memory array and configured to couple to a host, wherein the controller is configured to:
receive a memory access request comprising a first host L2P entry of a host L2P table stored in the host;
tabulate the first host L2P entry based on a first indication of the first host L2P entry not corresponding to a second indication of a first memory L2P entry of the memory L2P table, wherein the first host L2P entry corresponds to the first memory L2P entry; and
notify the host to refresh the host L2P table in response to a number of tabulations exceeding a threshold, and
wherein the first indication comprises a first hash of the first host L2P entry, and the second indication comprises a second hash of the first memory L2P entry.