US 12,436,848 B2
Memory device and operation method for generating check points based on write data pattern
Hye Mi Kang, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on May 20, 2024, as Appl. No. 18/668,589.
Claims priority of application No. 10-2023-0185748 (KR), filed on Dec. 19, 2023.
Prior Publication US 2025/0199917 A1, Jun. 19, 2025
Int. Cl. G06F 11/00 (2006.01); G06F 11/10 (2006.01); G06F 11/14 (2006.01)
CPC G06F 11/1469 (2013.01) [G06F 11/1016 (2013.01); G06F 11/1407 (2013.01)] 20 Claims
OG exemplary drawing
 
12. A method for operating a memory system, comprising:
recognizing a change in a pattern of a plurality of write data entries input from an external device and programmed in a memory device comprising a plurality of memory blocks;
determining whether a size of operational data regarding the plurality of write data entries is within a range that is capable of being stored in a buffer;
delaying a checkpoint operation associated with a write operation regarding the plurality of write data entries when the size of the operational data is within the range; and
performing the checkpoint operation when the size of the operational data is beyond the range.