US 12,436,831 B2
Normalization of detecting and reporting failures for a memory device
Randall J. Rooney, Boise, ID (US); and Gregg D. Wolff, Boise, ID (US)
Filed by Lodestar Licensing Group LLC, Evanston, IL (US)
Filed on Dec. 10, 2021, as Appl. No. 17/548,434.
Application 17/548,434 is a continuation of application No. 16/237,163, filed on Dec. 31, 2018, granted, now 11,200,105.
Prior Publication US 2022/0100597 A1, Mar. 31, 2022
Int. Cl. G06F 11/00 (2006.01); G06F 11/07 (2006.01); G06F 11/30 (2006.01); G11C 29/44 (2006.01); G11C 29/52 (2006.01)
CPC G06F 11/0766 (2013.01) [G06F 11/008 (2013.01); G06F 11/3037 (2013.01); G06F 11/3072 (2013.01); G11C 29/44 (2013.01); G11C 29/52 (2013.01); G06F 2201/81 (2013.01); G06F 2201/88 (2013.01)] 7 Claims
OG exemplary drawing
 
1. A memory device comprising:
a mode register circuit;
a memory array circuit; and
an error check and scrub (ECS) circuit coupled with the mode register circuit and the memory array circuit, wherein the ECS circuit:
reads data bits from the memory array circuit;
corrects one or more single bit errors in the data bits based at least in part on reading the data bits;
writes the corrected data bits to the memory array circuit based at least in part on correcting the one or more single bit errors in the data bits,
wherein an error count associated with bit errors is incremented based at least in part on the one or more single bit errors occurring in the data bits,
obtains, from the mode register circuit, a default fail threshold associated with the error count in the memory array circuit; and
stores, in the memory device, an indication of a first error range of two or more error ranges in the memory array circuit based at least in part on the error count being within the first error range and on obtaining the default fail threshold, wherein the two or more error ranges are based at least in part on the default fail threshold, wherein each of the two or more error ranges corresponds to a respective delineation between a minimum error count and a maximum error count, and wherein respective differences between the minimum error count and the maximum error count, for at least two error ranges of the two or more error ranges, are equivalent.