US 12,436,771 B2
Performing fused shift and logical operations in processor-based devices
Akilesh Krishnamurthy, San Jose, CA (US); and Conrado Blasco, San Mateo, CA (US)
Assigned to QUALCOMM Incorporated, San Diego, CA (US)
Filed by QUALCOMM Incorporated, San Diego, CA (US)
Filed on Dec. 29, 2023, as Appl. No. 18/400,294.
Prior Publication US 2025/0217153 A1, Jul. 3, 2025
Int. Cl. G06F 9/38 (2018.01); G06F 9/30 (2018.01)
CPC G06F 9/3853 (2013.01) [G06F 9/30029 (2013.01); G06F 9/30032 (2013.01)] 22 Claims
OG exemplary drawing
 
1. A processor device, comprising:
an instruction processing circuit comprising a shift/logical circuit; and
the instruction processing circuit configured to:
detect, in an instruction stream, one or more instructions to perform a shift operation and a subsequent bitwise logical operation; and
responsive to detecting the one or more instructions, perform, using the shift/logical circuit, the shift operation and the bitwise logical operation in a single processor clock cycle.