US 12,436,763 B2
Lookup table (LUT) vector instruction
Yasuko Eckert, Redmond, WA (US); Vadim Vadimovich Nikiforov, Berkeley, CA (US); Gabriel H. Loh, Bellevue, WA (US); and Bradford Beckmann, Redmond, WA (US)
Assigned to Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed by Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed on Mar. 30, 2023, as Appl. No. 18/128,963.
Prior Publication US 2024/0329984 A1, Oct. 3, 2024
Int. Cl. G06F 9/30 (2018.01)
CPC G06F 9/30038 (2023.08) [G06F 9/3001 (2013.01); G06F 9/30109 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An electronic device, comprising:
processing circuitry configured to:
receive an instruction for checking whether input values of an input vector meet a condition for executing a vector operation; and
execute the instruction to:
map a set of reference values of a reference vector to respective input values of the input vector, the reference vector having been generated prior to the instruction being executed; and
set control circuitry in vector lanes of the processing circuitry based on the set of reference values to control whether the vector operation is executed on the respective input values of the input vector.