| CPC G06F 3/0656 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01)] | 18 Claims |
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1. A system comprising:
a host device comprising a first buffer with ordered data;
an accelerator device comprising a data movement processor and a reordering buffer; and
a multiple-channel interface coupling the host device and the data movement processor of the accelerator device;
wherein the data movement processor is configured to:
issue first read commands for a portion of the ordered data and, in coordination with issuing the read commands, allocate respective entries of the reordering buffer and corresponding respective transaction identifiers for the first read commands;
maintain a remapping queue with a mapping between the transaction identifiers and corresponding tail indices of the reordering buffer;
provide a valid vector having a same number of entries as the reordering buffer;
maintain a head pointer corresponding to a next in-order entry to be read from the reordering buffer;
receive unordered responses to the first read commands, each of the responses including a respective one of the transaction identifiers;
store response data for the unordered responses at the corresponding allocated entries of the reordering buffer, based on the transaction identifiers respectively associated with the unordered responses, wherein storing the response data for the unordered responses comprises using information from the remapping queue to look up the tail index corresponding to the transaction identifier of each unordered response;
in response to writing response data from an unordered response to its respective allocated entry of the reordering buffer, set a respective valid bit in the valid vector, the valid bit indicating that its corresponding allocated entry of the reordering buffer includes the response data; and
when the head pointer corresponds to a particular entry of the reordering buffer and the valid bit for the particular entry is set, provide the response data from the particular entry of the reordering buffer to a particular interface queue of the multiple-channel interface, increment the head pointer, and clear the corresponding valid bit in the valid vector for the particular entry.
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